During the manufacture of various types of monolithic integrated circuits (ICs), such as high density DRAMs having several thousand transistors fabricated in a single chip of silicon, there are many stages in the multi-level layer wafer processing sequence where it is desirable to provide layers of a selected dielectric insulating material such as silicon dioxide, SiO2, or silicon nitride, Si3N4. As geometries shrink, particulate or particle defects in the dielectric layer can degrade performance of the device and lower yield.
Over the years, there have been many different types of thermal oxidation processes, vapor deposition processes and plasma deposition processes used to form oxides, nitrides, carbides, and other dielectric coatings in the manufacture of integrated circuits. In particular, plasma enhanced chemical vapor deposition (PECVD) systems have been used for dielectric deposition, but particle defects may be disadvantageously formed in the dielectric layer.